1. Technical Field
The present invention relates to a control device for mitigating output voltage oscillation in a switching power source that performs digital control.
2. Background Art
As shown in FIG. 6, conventional insulation type DC/DC converters include, in the secondary side of a transformer that outputs a prescribed voltage, a shunt regulator 710, an error amplifier, or the like that outputs an error voltage in which a difference between the output voltage and a target voltage is amplified, and additionally include an insulating element such as a photocoupler 720 or the like for sending the detected error voltage to the primary side of the transformer.
The primary side of the transformer includes a pulse width modulation (PWM) circuit 730, which generates a control pulse signal having a pulse width at a duty ratio based on the error voltage, and a desired output voltage is attained by controlling a switching element by the generated control pulse signal through a driver circuit 800.
PWM control is one example here, but it is also possible to use pulse frequency modulation (PFM) control by which it is possible to change the frequency or period of a pulse signal, and in such a case, the PWM control circuit 730 simply needs to be replaced with a PFM control circuit. In the description below, circuits that generate a control pulse signal are generally referred to as PWM control circuits.
In recent years, there has been a tendency for digital control to be performed for DC/DC converters. FIG. 7 shows an example of a configuration of a conventional insulation type DC/DC converter and a fully digital control device 900. A fully digital power source is proposed in which a control pulse signal is generated by providing a reference voltage source 911, an analog/digital (A/D) conversion circuit 912, a digital arithmetic circuit 913, and a digital PWM (DPWM) circuit 914 on the secondary side. Also, in the same fully digital power source, a method is proposed in which the output voltage is sent as feedback to the primary side using an analog isolation amplifier, and a control pulse signal is generated at the A/D conversion circuit, the digital arithmetic circuit, and the DPWM circuit, which are located at the primary side.
Various other configurations are possible for the digital power source, but an optimal configuration is selected based on the cost of parts and conversion efficiency. FIG. 8 shows an example of a configuration of a portion of a conventional insulation type DC/DC converter 300 and a control device 1000 that is of a digital control type. Similar to FIG. 6, a shunt regulator 1010 is disposed on the secondary side in order to generate an error voltage, with the insulating element being a photocoupler 1020, and the PWM control unit 1030 on the primary side is digital. In this case, the PWM control unit 1030 is constituted of an A/D conversion circuit 1031 that converts the error voltage to a digital value and a DPWM circuit 1032 that converts this digital value to a control pulse signal having a duty ratio or frequency based on the digital value obtained by A/D conversion.
In this configuration, the PWM control unit 1030 generates a control pulse signal such that the error voltage becomes zero, but depending on the response time of the A/D conversion circuit 1031 and the minimum variation width of the control pulse signal, which depends on the resolution of the A/D conversion circuit 1031 and the DPWM circuit 1032, the output voltage can oscillate around the target voltage. This is because, in the shunt regulator 1010, the difference between the output voltage and the target voltage is amplified at an amplification factor of a certain size in order for the output voltage Vout from the DC/DC converter 300 to be outputted at high accuracy. Thus, if there is even a small difference between the output voltage and the target voltage, a signal exceeding a resolution ΔADC of the A/D conversion circuit oscillating to the other side of the target is inputted to the A/D conversion circuit 1031. In such a circuit configuration, it is not possible to reduce the output voltage oscillation to zero, but by making the A/D conversion circuit 1031 and the DPWM circuit 1032 high resolution to reduce the minimum variation width of the control pulse signal, it is possible to mitigate oscillation.
However, if the number of bits of data used in a digital counter type DPWM circuit is increased by Npwm, then the control clock needs to be multiplied by 2 to the Npwm power, and thus, power consumption increases. Another DPWM circuit configuration is the direct line configuration, but this increases the area taken up by the DPWM circuit.
The resolution of the DPWM, the power consumption, and the circuit design have a tradeoff relation, and various circuit configurations have been proposed, one of these being a DPWM method using a digital dither (see Non-Patent Document 1). The DPWM configuration using a digital dither uses a low resolution DPWM circuit, but attains an accuracy of equally high resolution when an average is taken over a few to a dozen switching periods.
FIG. 9A shows a configuration of a typical digital dither circuit. A k bit digital arithmetic output is split by a data conversion circuit 1110 to a lower digit bit m and an upper digit bit n, and an M bit dither pattern generating circuit 1120 receives the present switching frequency information and the value of the lower digit m and outputs a 1 bit signal dsum (dither sum). This dsum is added to the upper digit bit n every switching period in an adder circuit 1130, and the sum is sent to the n bit DPWM circuit 1140 to generate a control pulse signal.
An example will be described in which an 8 bit DPWM circuit and a 2 bit dither circuit generates a control pulse signal based on a 10 bit input. FIG. 9B shows control pulse signals to which the dithers are added, and FIG. 9C shows the dither sums. In this case, the dither sum is a value of 0 or 1 during one period, but attains a four period average sum of 0, 0.25, 0.5, or 0.75, which means the accuracy increases fourfold. In other words, an 8 bit DPWM circuit achieves a 10 bit accuracy on average, and it is possible to increase the resolution (10 bit equivalent) while reducing the power consumption (8 bit circuit equivalent).
In the DPWM method using a digital dither of the related art, based on the example of FIG. 9B, it is assumed that the input is constant over the four periods during which the dither sum is determined. Therefore, in the case of a fully digital power source such as that shown in FIG. 7 in which the digital signal inputted in a normal state is constant, the difference between the output voltage and the target voltage is inputted to the A/D conversion circuit 912 at an amplification factor of 1, and thus, normally, the input variation can be ignored by the A/D conversion circuit 912 (variation width is less than the resolution ΔADC of the A/D conversion circuit), which has the advantage of improving output voltage accuracy.
Also, Patent Documents 1 and 2 respectively disclose a method of transmitting the A/D conversion result to which the digital dither method is applied, and an engine control device.